Please use this identifier to cite or link to this item:
https://hdl.handle.net/20.500.11851/10312
Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Olgun, Ataberk | - |
dc.contributor.author | Luna, Juan Gomez | - |
dc.contributor.author | Kanellopoulos, Konstantinos | - |
dc.contributor.author | Salami, Behzad | - |
dc.contributor.author | Hassan, Hasan | - |
dc.contributor.author | Ergin, Oguz | - |
dc.contributor.author | Mutlu, Onur | - |
dc.date.accessioned | 2023-04-16T10:00:15Z | - |
dc.date.available | 2023-04-16T10:00:15Z | - |
dc.date.issued | 2022 | - |
dc.identifier.issn | 1544-3566 | - |
dc.identifier.issn | 1544-3973 | - |
dc.identifier.uri | https://doi.org/10.1145/3563697 | - |
dc.identifier.uri | https://hdl.handle.net/20.500.11851/10312 | - |
dc.description.abstract | Commodity DRAM-based processing-using-memory (PuM) techniques that are supported by off-the-shelf DRAM chips present an opportunity for alleviating the data movement bottleneck at low cost. However, system integration of these techniques imposes non-trivial challenges that are yet to be solved. Potential solutions to the integration challenges require appropriate tools to develop any necessary hardware and software components. Unfortunately, current proprietary computing systems, specialized DRAM-testing platforms, or system simulators do not provide the flexibility and/or the holistic system view that is necessary to properly evaluate and deal with the integration challenges of commodity DRAM-based PuM techniques. We design and develop Processing-in-DRAM (PiDRAM), the first flexible end-to-end framework that enables system integration studies and evaluation of real, commodity DRAM-based PuM techniques. PiDRAM provides software and hardware components to rapidly integrate PuM techniques across the whole system software and hardware stack. We implement PiDRAM on an FPGA-based RISC-V system. To demonstrate the flexibility and ease of use of PiDRAM, we implement and evaluate two state-of-the-art commodity DRAMbased PuM techniques: (i) in-DRAM copy and initialization (RowClone) and (ii) in-DRAM true random number generation (D-RaNGe). We describe how we solve key integration challenges to make such techniques work and be effective on a real-system prototype, including memory allocation, alignment, and coherence. We observe that end-to-end RowClone speeds up bulk copy and initialization operations by 14.6x and 12.6x, respectively, over conventional CPU copy, even when coherence is supported with inefficient cache flush operations. Over PiDRAM's extensible codebase, integrating both RowClone and D-RaNGe end-to-end on a real RISC-V system prototype takes only 388 lines of Verilog code and 643 lines of C++ code. | en_US |
dc.description.sponsorship | Semiconductor Research Corporation; ETH Future Computing Laboratory | en_US |
dc.description.sponsorship | We thank the reviewers of MICRO 2021, HPCA 2022, and TACO for feedback. We thank the SAFARI Research Group members for valuable feedback and the stimulating intellectual environment they provide. We acknowledge the generous gifts provided by our industrial partners, including Google, Huawei, Intel, Microsoft, and VMware. This research was also supplied in part by the Semiconductor Research Corporation and the ETH Future Computing Laboratory. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Assoc Computing Machinery | en_US |
dc.relation.ispartof | Acm Transactions on Architecture and Code Optimization | en_US |
dc.rights | info:eu-repo/semantics/openAccess | en_US |
dc.subject | Processing-using-memory | en_US |
dc.subject | processing-in-memory | en_US |
dc.subject | RISC-V | en_US |
dc.subject | FPGA | en_US |
dc.subject | DRAM | en_US |
dc.subject | memory controllers | en_US |
dc.subject | Logic Operations | en_US |
dc.subject | Latency Dram | en_US |
dc.subject | Memory | en_US |
dc.subject | Cpu | en_US |
dc.title | Pidram: a Holistic End-To Fpga-Based Framework for Processing-In | en_US |
dc.type | Article | en_US |
dc.department | TOBB ETÜ | en_US |
dc.identifier.volume | 20 | en_US |
dc.identifier.issue | 1 | en_US |
dc.authorid | Gomez Luna, Juan/0000-0002-6514-1571 | - |
dc.identifier.wos | WOS:000934935100008 | en_US |
dc.identifier.scopus | 2-s2.0-85138695837 | en_US |
dc.institutionauthor | … | - |
dc.identifier.doi | 10.1145/3563697 | - |
dc.authorscopusid | 57222238840 | - |
dc.authorscopusid | 57211567599 | - |
dc.authorscopusid | 57211567864 | - |
dc.authorscopusid | 56029413900 | - |
dc.authorscopusid | 57189066886 | - |
dc.authorscopusid | 6603141208 | - |
dc.authorscopusid | 16043006700 | - |
dc.relation.publicationcategory | Makale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanı | en_US |
dc.identifier.scopusquality | Q2 | - |
item.openairetype | Article | - |
item.languageiso639-1 | en | - |
item.grantfulltext | none | - |
item.fulltext | No Fulltext | - |
item.openairecristype | http://purl.org/coar/resource_type/c_18cf | - |
item.cerifentitytype | Publications | - |
crisitem.author.dept | 02.3. Department of Computer Engineering | - |
Appears in Collections: | Scopus İndeksli Yayınlar Koleksiyonu / Scopus Indexed Publications Collection WoS İndeksli Yayınlar Koleksiyonu / WoS Indexed Publications Collection |
CORE Recommender
SCOPUSTM
Citations
2
checked on Dec 21, 2024
WEB OF SCIENCETM
Citations
7
checked on Oct 5, 2024
Page view(s)
82
checked on Dec 23, 2024
Google ScholarTM
Check
Altmetric
Items in GCRIS Repository are protected by copyright, with all rights reserved, unless otherwise indicated.