Jj-Soma: Towards a Spiking Neuromorphic Processor Architecture

Abstract

Neuromorphic computing and artificial neurons have been shown to improve the solution for some of the complex problems for conventional computers. We present a spiking soma (JJ-Soma) circuit that consists of a double-junction SQUID interfered with a resistor (threshold loop), a decaying superconductor loop cut by a resistor, which is coupled to the SQUID like structure. The proposed soma has three main properties: (i) ultra-high-speed operation with minimal power consumption, (ii) compatibility with standard foundry processes that allows fabrication with the available infrastructure, (iii)and compatibility with conventional SFQ logic gates which enables design and implementation of complicated networks. Each soma circuit covers 40 μm × 80 μm area on-chip with different activation functions. The circuits are fabricated in a commercial foundry for superconductors and they have been implemented and demonstrated experimentally. IEEE