Please use this identifier to cite or link to this item: https://hdl.handle.net/20.500.11851/1298
Title: Development of an Optimizer for Vortex Transitional Memory Using Particle Swarm Optimization
Authors: Karamüftüoğlu, Mustafa Altay
Demirhan, Seda
Komura, Yuto
Çelik, Mustafa Eren
Tanaka, Masamitsu
Bozbey, Ali
Fujimaki, Akira
Keywords: Memory
optimization
particle swarm optimization (PSO)
superconductor
vortex transitional memory (VTM) cell
Publisher: IEEE-Inst Electrical Electronics Engineers Inc
Source: Karamuftuoglu, M. A., Demirhan, S., Komura, Y., Celik, M. E., Tanaka, M., Bozbey, A., & Fujimaki, A. (2016). Development of an Optimizer for Vortex Transitional Memory Using Particle Swarm Optimization. IEEE Transactions on Applied Superconductivity, 26(8), 1-6.
Abstract: High-performance computing that involves superconducting digital circuits is one of the promising technologies. A number of groups have already demonstrated working prototypes of CPUs or ALUs. However, one of the bottlenecks of these circuits is that it is very difficult to have large memories with very high speed and low-power consumption. One of the potential candidates compatible with the already available superconducting foundries that might enable on-chip memory is the vortex transitional memory (VTM) cell. However, VTM operation is mainly based on dc I/O rather than single-flux quantum I/O. VTM cell is mainly based on four Josephson junctions and it is a relatively simple circuit. Nevertheless, optimization of such a cell is a hectic process, as VTM cells are not used as a single cell but combined all together inside a connected network. In this study, we report an optimizer that uses particle swarm optimization algorithm and the results of optimization of VTM cells. By starting from random circuit parameters, the optimizer is able to converge on a working set of parameters fabricated using AIST standard process 2 and advanced process 2 processes with a minimum margin of +/- 30% and +/- 15%, respectively. Optimizations are completed in less than 100 h on a 12-core computer. Fabricated VTM cells have 15% operation margin.
URI: https://ieeexplore.ieee.org/document/7539343
https://hdl.handle.net/20.500.11851/1298
ISSN: 1051-8223
Appears in Collections:Elektrik ve Elektronik Mühendisliği Bölümü / Department of Electrical & Electronics Engineering
Scopus İndeksli Yayınlar Koleksiyonu / Scopus Indexed Publications Collection
WoS İndeksli Yayınlar Koleksiyonu / WoS Indexed Publications Collection

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