Please use this identifier to cite or link to this item: https://hdl.handle.net/20.500.11851/6690
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dc.contributor.authorJones, Timothy M.-
dc.contributor.authorO'Boyle, Michael F. P.-
dc.contributor.authorAbella, Jaume-
dc.contributor.authorGonzalez, Antonio-
dc.contributor.authorErgin, Oğuz-
dc.date.accessioned2021-09-11T15:43:12Z-
dc.date.available2021-09-11T15:43:12Z-
dc.date.issued2009en_US
dc.identifier.issn1544-3566-
dc.identifier.issn1544-3973-
dc.identifier.urihttps://doi.org/10.1145/1582710.1582714-
dc.identifier.urihttps://hdl.handle.net/20.500.11851/6690-
dc.description.abstractRegister pressure in modern superscalar processors can be reduced by releasing registers early and by copying their contents to cheap back-up storage. This article quantifies the potential benefits of register occupancy reduction and shows that existing hardware-based schemes typically achieve only a small fraction of this potential. This is because they are unable to accurately determine the last use of a register and must wait until the redefining instruction enters the pipeline. On the other hand, compilers have a global view of the program and, using simple dataflow analysis, can determine the last use. This article evaluates the extent to which compiler analysis can aid early releasing, explores the design space, and introduces commit and issue-based early releasing schemes, quantifying their benefits. Using simple compiler analysis and microarchitecture changes, we achieve 70% of the potential register file occupancy reduction. By adding more hardware support, we can increase this to 94%. Our schemes are compared to state-of-the-art approaches for varying register file sizes and are shown to outperform these existing techniques.en_US
dc.description.sponsorshipRoyal Academy of Engineering, EPSRCRoyal Academy of Engineering - UKUK Research & Innovation (UKRI)Engineering & Physical Sciences Research Council (EPSRC); Spanish Ministry of Science and InnovationSpanish Government [TIN2007-61763]; Generalitat de CatalunyaGeneralitat de Catalunya [2009 SGR 1250]en_US
dc.description.sponsorshipThis work has been partially supported by the Royal Academy of Engineering, EPSRC and the Spanish Ministry of Science and Innovation under grant TIN2007-61763 and the Generalitat de Catalunya under grant 2009 SGR 1250.en_US
dc.language.isoenen_US
dc.publisherAssoc Computing Machineryen_US
dc.relation.ispartofAcm Transactions On Architecture And Code Optimizationen_US
dc.rightsinfo:eu-repo/semantics/openAccessen_US
dc.subjectExperimentationen_US
dc.subjectMeasurementen_US
dc.subjectPerformanceen_US
dc.subjectLow-power designen_US
dc.subjectenergy efficiencyen_US
dc.subjectcompileren_US
dc.subjectmicroarchitectureen_US
dc.subjectregister fileen_US
dc.titleExploring the Limits of Early Register Release: Exploiting Compiler Analysisen_US
dc.typeArticleen_US
dc.departmentFaculties, Faculty of Engineering, Department of Computer Engineeringen_US
dc.departmentFakülteler, Mühendislik Fakültesi, Bilgisayar Mühendisliği Bölümütr_TR
dc.identifier.volume6en_US
dc.identifier.issue3en_US
dc.authorid0000-0003-2701-3787-
dc.authorid0000-0002-0009-0996-
dc.authorid0000-0001-7951-4028-
dc.authorid0000-0002-4114-7661-
dc.identifier.wosWOS:000271212500004en_US
dc.identifier.scopus2-s2.0-70350107209en_US
dc.institutionauthorErgin, Oğuz-
dc.identifier.doi10.1145/1582710.1582714-
dc.relation.publicationcategoryMakale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanıen_US
dc.identifier.scopusqualityQ2-
item.cerifentitytypePublications-
item.languageiso639-1en-
item.openairecristypehttp://purl.org/coar/resource_type/c_18cf-
item.openairetypeArticle-
item.fulltextNo Fulltext-
item.grantfulltextnone-
crisitem.author.dept02.3. Department of Computer Engineering-
Appears in Collections:Bilgisayar Mühendisliği Bölümü / Department of Computer Engineering
Scopus İndeksli Yayınlar Koleksiyonu / Scopus Indexed Publications Collection
WoS İndeksli Yayınlar Koleksiyonu / WoS Indexed Publications Collection
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