Please use this identifier to cite or link to this item: https://hdl.handle.net/20.500.11851/5750
Title: Fuse: A technique to anticipate failures due to degradation in ALUs
Authors: Abella J.
vera X.
Ünsal O.
Ergin, Oğuz
González A.
Issue Date: 2007
Source: IOLTS 2007 13th IEEE International On-Line Testing Symposium, 8 July 2007 through 11 July 2007, Heraklion, Crete, 72540
Abstract: This paper proposes the fuse, a technique to anticipate failures due to degradation in any ALU (Arithmetic Logic Unit), and particularly in an adder. The fuse consists of a replica of the weakest transistor in the adder and the circuitry required to measure its degradation. By mimicking the behavior of the replicated transistor the fuse anticipates the failure short before the first failure in the adder appears, and hence, data corruption and program crashes can be avoided. Our results show that the fuse anticipates the failure in more than 99.9% of the cases after 96.6% of the lifetime, even for pessimistic random within-die variations. © 2007 IEEE.
URI: https://doi.org/10.1109/IOLTS.2007.34
https://hdl.handle.net/20.500.11851/5750
ISBN: 0769529186; 9780769529189
Appears in Collections:Bilgisayar Mühendisliği Bölümü / Department of Computer Engineering
Scopus İndeksli Yayınlar Koleksiyonu / Scopus Indexed Publications Collection

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